JTAG: Joint Test Action Group联合测试行动小组的简称。 成立于1980年，目的是制定统一的芯片测试方法——边界扫描测试。 该测试标准于1990年被电气电子工程师协会(IEEE )采用为标准IEEE Standard 1149.1-1990，待决的相应标准文档： http://冷静棒球. dmcs.pl/~cmaj/JTAG/JTAG_IEEE-STD-1149.1-2001.pdf其他参考文档： http://冷静棒球. dmcs.pl/~ rkielbik iee _ 1149 _ JTAG _ and _ boundary education download/JTAG-tutorial.pdftheieestandarddefinesthetestaccessport (由tap、4-5管脚组成)、the TAP controller ) )
JTAG Chip Architecture
qsetoffourdedicatedtestpins—test datain (TDI )、testmodeselect (TMS )和test clock (tck ) )、 testdataout(tdo ) andoneoptionaltestpintestreset ) trst* ).thesepinsarecollectivelyreferredtoasthetestaccessport ) tap.QA boundary-scancellonthedeviceprimaryinputandprimaryoutoutandprimatoutation 连接外部机制扫描注册器(boundary scan ).qafinite-statemachinetapcontrollerwithinputstck， statemachinetapcontrollerwithinputstck andt rst *.qann-bit (n2 ) instructionregister )，holdingthecurrentinstruction capableofbeingloadedwithapermanentdeviceidentificationcode.http://www.Sina.com/thephysicaljtaginterface， ortestaccessport(tap ) consistsoffourmandatorysignalsandoneoptionalasynchronousresetsignal.table1belowsumarizesthejtagtap
33558www.Sina.com/thetapcontrollerasdefinedbytheieee-1149.1 standardusesa 16-statefinitestatemachinecontrolledbyatestcct andtestmodeselect erminedbythestateoftmsontherisingedgeoftck.twoanalogouspathsthroughthestatemachineareusedtocapturation nd/orupdatedatabyscanningthroughtheinstructionregister (IR ) orthroughadataregister ).thejtagstatemachineisdepictedii
33558 www.Sina.com/theirmustbeatleasttwo-bits long (toallowcodingofthefourmandatoryinstructions-bypass，Sample，preate，pred
icant bits must capture a 01 pattern The instruction is used to select the test to be performed or the test data register to be accessed or both.因为指令寄存器只有一个，状态机select-IR-scan首先更新指令寄存器的内容，然后状态机转到select-DR-scan, 根据指令寄存器的内容解码形成scan path，即连接TD1 à Data register à TDO, 然后更新data register的内容。 JTAG data register IEEE-1149.1 标准规定必须实现的数据寄存器有：边界扫描寄存器（BSR），旁路寄存器和识别码寄存器。其他数据寄存器可能存在，但不是JTAG标准所需的部分。BSR–这是主要测试的数据寄存器。它被用来把数据从器件I/O针脚处移出和移入。BYPASS这是一个把信息从TDI传到TDO的单位寄存器。它可以用最小的系统开销来测试电路中其他的器件。IDCODES–这个寄存器含有器件的识别码和版本序号。这个信息可以使器件和它的边界扫描描述语言（BSDL）文件相关联这个文件含有器件边界扫描配置的详细情况。
Capture-IR State In the Capture-IR state, the two LSBs of the Instruction register are loaded with the value 012, and the upper MSBs are loaded with implementation-dependent values. Both values are loaded on the rising edge of TCK. Shift-IR State In the Shift-IR state, the LSB of the Instruction register is output on TDO on the falling edge of TCK. The Instruction register is shifted one position from MSB to LSB on the rising edge of TCK, with the MSB shifted in from TDI. The value in the Instruction register does not take effect until the Update-IR state.
Update-IR State In the Update-IR state, the value in the Instruction register takes effect on the rising or falling edge of TCK. Capture-DR State In the Capture-DR state, the value of the selected data register(s) is captured on the rising edge of TCK for shifting out in the Shift-DR state. The Capture-DR state reads the data, in order to output this read value in the Shift-DR state. The Instruction register controls the selection of the following data register(s): Bypass, Device ID, Implementation, EJTAG Control, Address, and Data register(s). Shift-DR State In the Shift-DR state, the LSB of the selected data register(s) is output on TDO on the falling edge of TCK. The selected data register(s) is shifted one position from MSB to LSB on the rising edge of TCK, with TDI shifted in at the MSB. The value(s) shifted into the register(s) does not take effect until the Update-DR state. Update-DR State In the Update-DR state, the update of the selected data register(s) with the value from the Shift-DR state occurs on the falling or rising edge of TCK. This update writes the selected register(s).
JTAG Instructions IEEE-1149.1 标准规定必须实现的指令有： EXTEST The EXTEST instruction is used to perform interconnect testing. When the EXTEST instruction is used, the mandatory boundary-scan register is connected between TDI and TDO and the device is placed in an “external” test mode. In this mode, boundary-scan output cells will drive test data onto the device pins and input cells will capture data from device pins—this is the main instruction used for boundary-scan testing. SAMPLE/PRELOAD The SAMPLE/PRELOAD instruction is similar to EXTEST, but allows the boundary-scan device to remain in mission/functional mode while still connecting the boundary-scan register to TDI and TDO. When the SAMPLE/PRELOAD instruction is used, the boundary-scan register is accessible through data scans while the device remains functional . This is also useful for preloading data into the boundary-scan register without interrupting the device’s functional behavior, prior to executing the EXTEST instruction. BYPASS When the BYPASS instruction is used, TDI and TDO are connected to a single-bit register that bypasses the longer boundary-scan register of the device—hence the name. BYPASS is very useful for reducing the overall length of a boundary-scan chain by eliminating devices that do not need to be involved in the current action. D evices that are given the BYPASS instruction remain in mission/functional mode while allowing serial data to flow through to the next device in the chain.
边界扫描 JTAG定义最初的目的是为了边界扫描 Primarily, boundary-scan cells must be provided on all device input and output signal pins, with the exception of Power and Ground.
It has four modes of operation: normal, update, capture, and serial shift.