我晚上跟踪了spi_test.c。 数据传输过程如下：
传输器() (spidev_test.c ) -
ioctl () (spidev_test.c ) -
spidev_ioctl () (spidev_test.c )---
spidev_message () ) (spidev.c )---
spidev_sync () (spidev.c )---
SPI_async(SPI.h )--调用
SPI -主传输器(SPI，消息) )。
bitbang_work () (spi_bitbang.c ) -
spidev_message ()函数：
1 )将用户空间的数据传递给buf
spidev_sync ) )在函数的一级调用中传输数据
3 )将buf中的数据发送到用户空间，在终端上显示
代码执行a.out跟踪代码如下所示
# mount all .
mount : mountingnoneon/proc/bus/USB故障排除： nosuchfileordirectory
# Starting mdev .
starting pid 358，tty '': '-/bin/sh '
h clock : can ' topen '/dev/misc/RTC ' : nosuchfileordirectory
mkdir : cannotcreatedirectory '/var/run ' :文件退出
/# ./a.out
after the open---------------------------------------------------- -。
wehaveentertheiocontl * * * * * * * * * * * * * * * * * * * * *
wehaveentertheiocontl * * * * * * * * * * * * * * * * * * * * *
7 spidevspi 0.0: beforethesetup------1------- -
7 spidevspi 0.0:---* * * * * * weenterthesep 4020 _ soi _ setup xfer
7 SPI : sep 4020 _ SPI _ setup xfer 3360 wegettheclkrateis 176
7 spidevspi 0.0:设置预缩放到176 (Hz 500000 ) )。
7 SPI : sep 4020 _ SPI _ setup xfer : thevalueofdivis 176
7 SPI : sep 4020 _ SPI _ setup xfer : thevalueofbitbang _ cs _ inactive is0
7 SPI : sep 4020 _ SPI _ chips El : wehaveenterthesep 4020 _ SPI _ chips El
7 spidevspi 0.0: sep 4020 _ SPI _ setup : mode 0，8 BPW，500000 hz
7spidev spi0.0: spi mode 00
wehaveentertheiocontl * * * * * * * * * * * * * * * * * * * * *
wehaveentertheiocontl * * * * * * * * * * * * * * * * * * * * *
afterthespimode--------------------------------；
wehaveentertheiocontl * * * * * * * * * * * * * * * * * * * * *
wehaveentertheiocontl * * * * * * * * * * * * * * * * * * * * *
7 spidevspi 0.0: beforethesetup----------3--------- -
3333333333333333333
3333333333333333333
7 spidevspi 0.0:---- * * * * * ween
ter the sep4020_soi_setupxfer<7>SPI: sep4020_spi_setupxfer: we get the clk rate is 176
<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)
<7>SPI: sep4020_spi_setupxfer: the value of div is 176
<7>SPI: sep4020_spi_setupxfer: the value of BITBANG_CS_INACTIVE is 0
<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel
<7>spidev spi0.0: sep4020_spi_setup: mode 0, 8 bpw, 500000 hz
<7>spidev spi0.0: 8 bits per word
we have enter the iocontl*****************
we have enter the iocontl*****************
after the bits per wors-----------------------------
we have enter the iocontl*****************
we have enter the iocontl*****************
<7>spidev spi0.0: before the setup-------------4---
<7>spidev spi0.0: ---********we enter the sep4020_soi_setupxfer
<7>SPI: sep4020_spi_setupxfer: we get the clk rate is 176
<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)
<7>SPI: sep4020_spi_setupxfer: the value of div is 176
<7>SPI: sep4020_spi_setupxfer: the value of BITBANG_CS_INACTIVE is 0
<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel
<7>spidev spi0.0: sep4020_spi_setup: mode 0, 8 bpw, 500000 hz
<7>spidev spi0.0: 500000 Hz (max)
we have enter the iocontl*****************
we have enter the iocontl*****************
after the max speed hz----------------------------------
spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)
before the transfer iocontl
we have enter the iocontl*****************
we have enter the iocontl*****************
<7>spidev spi0.0: default-------------
--------1--------
--------1--------
---------2-------
---------2-------
--------3--------
--------3--------
--------4--------
--------4--------
--------5--------
--------5--------
--------6--------
--------6--------
we are in spidev_sync -----
we are in spidev_sync -----
********************spi_bitbang_transfer***********************************
********************spi_bitbang_transfer***********************************
********************spi_bitbang_transfer****************end*******************
********************spi_bitbang_transfer****************end*******************
after the spi_async
after the spi_async
1
1
2
2
*******************bitbang_work***********************************
*******************bitbang_work***********************************
bitbang_work*******1***********
bitbang_work*******1***********
we enter the sep4020_soi_setupxfer
we enter the sep4020_soi_setupxfer
<7>SPI: sep4020_spi_setupxfer: we get the clk rate is 176
<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)
<7>SPI: sep4020_spi_setupxfer: the value of div is 176
bitbang_work*******2***********
bitbang_work*******2***********
<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel
<7>SPI: sep4020_spi_chipsel: we have enble spi in the sep4020_spi_chipsel
bitbang_work*******3***********
bitbang_work*******3***********
bitbang_work*******4***********
bitbang_work*******4***********
<7>spidev spi0.0: txrx: tx c1c0c000, rx c1c0c000, len 38
<7>SPI: sep4020_spi_txrx: the value of 飞快的乌冬面 is :0x1
<7>SPI: sep4020_spi_txrx: in sep4020_spi_irq before enable spi in txrx
<7>SPI: sep4020_spi_txrx: have enble spi in txrx
<7>SPI: sep4020_spi_txrx: we begin to sent the first byte:0xff
<7>SPI: sep4020_spi_txrx: SSI_IMR:0x1e ,SSI_ISR:0x0 ,SSI_RISR:0x1 ,SSI_SR:0x2
<7>SPI: sep4020_spi_irq: I am done
<7>SPI: sep4020_spi_txrx: the read data is :0
we enter the sep4020_soi_setupxfer
we enter the sep4020_soi_setupxfer
<7>SPI: sep4020_spi_setupxfer: we get the clk rate is 176
<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)
<7>SPI: sep4020_spi_setupxfer: the value of div is 176
<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel
*******************bitbang_work********************end***************
*******************bitbang_work********************end***************
3
3
4
4
5
5
the end of the spidev_sync----
the end of the spidev_sync----
-------7--------
-------7--------
we have after the transfer iocotl----------
FF FF FF FF FF FF
40 00 00 00 00 95
FF FF FF FF FF FF
FF FF FF FF FF FF
FF FF FF FF FF FF
DE AD BE EF BA AD
/ #