9.3.13修改app.out在nor flash的起始地址
C:MinGWmsys1.0iblboot_loaderiblsrcutiliblConfigsrcdevice.c
9.3.14 NOR FLASH IBL使用烧写步骤
最终编译出来的NOR Flash的IBL镜像为spiRom.bin（C:MinGWmsys1.0iblboot_loaderiblsrcmakeibl_c66x）使用norwriter_evm6678l.out将IBL烧写到NOR 0地址处使用norwriter_evm6678l.out将app烧写到NOR 0x100000地址处，将开发板设置为NOR flash启动，重启开发板即可看到如下打印： 两种模式下nor_writer_input.txt文件内容如下：烧写IBL：
烧写app （start_addr = 1048576）
9.3.15 4TI-64bit DDR初始化
上一节发现IBL中DDR初始化失败修改方法：将创龙提供的DSP_C6678.gel文件中的IBL DDR配置参数拷贝来，重新编译C:MinGWmsys1.0iblboot_loaderiblsrcutiliblConfigsrcdevice.c 函数c6678_ibl_config
9.3.16 黑边-32bit DDR初始化
ibl_t c6678_ibl_config(void){ibl_t ibl; memset(&ibl, 0, sizeof(ibl_t)); ibl.iblMagic = ibl_MAGIC_VALUE;ibl.iblEvmType = ibl_EVM_C6678L;/* Main PLL: 100 MHz reference, 1GHz output */ibl.pllConfig[ibl_MAIN_PLL].doEnable = 1;ibl.pllConfig[ibl_MAIN_PLL].prediv = 1;ibl.pllConfig[ibl_MAIN_PLL].mult = 20;ibl.pllConfig[ibl_MAIN_PLL].postdiv = 2;ibl.pllConfig[ibl_MAIN_PLL].pllOutFreqMhz = 1000;/* DDR PLL: */ibl.pllConfig[ibl_DDR_PLL].doEnable = 1; ibl.pllConfig[ibl_DDR_PLL].prediv = 1;ibl.pllConfig[ibl_DDR_PLL].mult = 12;ibl.pllConfig[ibl_DDR_PLL].postdiv = 1;ibl.pllConfig[ibl_DDR_PLL].pllOutFreqMhz = 800; /* Net PLL: 100 MHz reference, 1050 MHz output (followed by a built in divide by 3 to give 350 MHz to PA) */ibl.pllConfig[ibl_NET_PLL].doEnable = 0;ibl.pllConfig[ibl_NET_PLL].prediv = 1;ibl.pllConfig[ibl_NET_PLL].mult = 21;ibl.pllConfig[ibl_NET_PLL].postdiv = 2;ibl.pllConfig[ibl_NET_PLL].pllOutFreqMhz = 1050;ibl.ddrConfig.configDdr = 1;ibl.ddrConfig.uEmif.emif4p0.registerMask = ibl_EMIF4_ENABLE_sdRamConfig | ibl_EMIF4_ENABLE_sdRamRefreshCtl | ibl_EMIF4_ENABLE_sdRamTiming1 | ibl_EMIF4_ENABLE_sdRamTiming2 | ibl_EMIF4_ENABLE_sdRamTiming3 | ibl_EMIF4_ENABLE_ddrPhyCtl1;ibl.ddrConfig.uEmif.emif4p0.sdRamConfig= 0x63066A32; //0x63066A32ibl.ddrConfig.uEmif.emif4p0.sdRamConfig2= 0;ibl.ddrConfig.uEmif.emif4p0.sdRamRefreshCtl= 0x000030D4;ibl.ddrConfig.uEmif.emif4p0.sdRamTiming1= 0x1113783C;ibl.ddrConfig.uEmif.emif4p0.sdRamTiming2= 0x30717FE3;ibl.ddrConfig.uEmif.emif4p0.sdRamTiming3 = 0x559F86AF;ibl.ddrConfig.uEmif.emif4p0.lpDdrNvmTiming= 0;ibl.ddrConfig.uEmif.emif4p0.powerManageCtl= 0;ibl.ddrConfig.uEmif.emif4p0.iODFTTestLogic= 0;ibl.ddrConfig.uEmif.emif4p0.performCountCfg= 0;ibl.ddrConfig.uEmif.emif4p0.performCountMstRegSel= 0;ibl.ddrConfig.uEmif.emif4p0.readIdleCtl= 0;ibl.ddrConfig.uEmif.emif4p0.sysVbusmIntEnSet= 0;ibl.ddrConfig.uEmif.emif4p0.sdRamOutImpdedCalCfg= 0;ibl.ddrConfig.uEmif.emif4p0.tempAlterCfg= 0;ibl.ddrConfig.uEmif.emif4p0.ddrPhyCtl1 = 0x0010010F;ibl.ddrConfig.uEmif.emif4p0.ddrPhyCtl2= 0;ibl.ddrConfig.uEmif.emif4p0.priClassSvceMap= 0;ibl.ddrConfig.uEmif.emif4p0.mstId2ClsSvce1Map= 0;ibl.ddrConfig.uEmif.emif4p0.mstId2ClsSvce2Map= 0;ibl.ddrConfig.uEmif.emif4p0.eccCtl = 0;ibl.ddrConfig.uEmif.emif4p0.eccRange1= 0;ibl.ddrConfig.uEmif.emif4p0.eccRange2= 0;ibl.ddrConfig.uEmif.emif4p0.rdWrtExcThresh= 0;………}9.3.17 配合MAD工具使用IBL配置修改点
https://processors.wiki.ti.com/index.php/MCSDK_Image_Processing_Demonstration_Guide
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9.3.18 IBL中打印变量值