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三态双向驱动器verilog,TTL三态门

时间:2023-05-03 17:38:29 阅读:153333 作者:456

三态门主要有bufif0/bufif1/notif0/notif1

三态门使能们用实例声明语法:

选通实例化:3360=* * enable _ gate _ instance ([ delay3] * * enable _ gate );

*使能门类型* * :3360=buf if0|buf if1|notif0| notif 1

**enablementage实例* * :=[ name _ of _ instance ] (output _ terminal,input_terminal,enable_terminal )

1.驱动强度规格

anoptionaldrivestrengthspecificationshallspecifythestrengthofthelogicvaluesontheoutterminalsofthegateinstance。

thedrivestrengthspecificationforagateinstance,witheexceptionofpullupandpulldown,shallhaveastrength1specificationanandastion

* the strength1specificationshallspecifythestrengthofsignalswithalogicvalue 1,and the strength0specificationshalllspecifythestreng

the strength1specificationshallbeoneofthefollowingkeywords 3360

supply1 strong1 pull1 weak1

the strength0specificationshallbeoneofthefollowingkeywords 3360

supply0 strong0 pull0 weak0

specifyinghighz1as strength1shallcausethegateorswitchtooutputalogicvaluezinplaceofa 1。

specifyinghighz0shallcausethegatetooutputalogicvaluezinplaceofa 0。

thestrengthspecifications (highz 0,highz1) and ) highz1,highz0) shall be considered invalid。

* intheabsenceofastrengthspecification,theinstancesshallhavethedefaultstrengthsstrong1and strong0. * *

2.延迟规格

anoptionaldelayspecificationshallspecifythepropagationdelaythroughthegatesandswitchesina

解释。

* gatesandswitchesindeclarationswithnodelayspecificationshallhavenopropagationdelay.* *

adelayspecificationcancontainuptothreedelayvalues,depending on the gate type。

thepullupandpulldowninstancedeclarationsshallnotincludedelayspecifications。

3.三态门真值表如下

thefollowingexampledeclaresaninstanceofbufif 1:

*bufif1BF1(outw,inw,controlw ); **

The output is outw,the input is inw,andthecontroliscontrolw.theinstancenameisbf 1。

thedelayspecificationshallbezero,one,two,or three delays。

1.ifthedelayspecificationcontainsthreedelays,thefirstdelayshalldeterminetherisedelay, theseconddelayshalldeterminethefall thethirddelayshalldeterminethedelayoftransitionstoz,andthesmallestofthethreedelayssshallded

2.ifthespecificationcontainstwodelays,thefirstdelayshalldeterminetheoutputrisedelay,theseconddelayshalldeterminetheoutputpup

3.If only one delay is specified,itshallspecifythedelayforalloutputtransitions。

4.ifthereisnodelayspecification,thereshallbenopropagationdelaythroughthegate。

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